january 2002 - revised may 2007 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP4A265H3BJ lcas r line protector TISP4A265H3BJ asymmetrical bidirectional thyristor spd description ring line protection for: -lcas (line card access switch) -adsl interfaces voltages optimized for: -battery-backed ringing circuits maximum ringing a.c. .......................................... 90 v rms maximum battery voltage .......................................... -52 v -adsl voltage ......................................................... 23 v peak -minimum ambient temperature ...................................... 0 ? the TISP4A265H3BJ is an asymmetrical bidirectional overvoltage protector. it is designed to limit the peak voltages on the ring line terminal of the ?581/2/3 lcas (line card access switches). the TISP4A265H3BJ must be connected with bar-indexed terminal 1, mt1, to the pr otective ground and terminal 2, mt2, to the ring conductor. the TISP4A265H3BJ voltages are chosen to give adequate lcas ring line terminal protection for all switch conditions. the most p otentially stressful condition is low level power cross when the lcas switches are closed. under this condition, the TISP4A265H3BJ limits the voltage and corresponding lcas dissipation until the lcas thermal trip operates and opens the switches. under open-circuit ringing conditions, the line ring conductor will have high peak voltages. for battery backed ringing, the ri ng conductor will have a larger peak negative voltage than positive, i.e. the peak voltages are asymmetric. the TISP4A265H3BJ has a similar volta ge asymmetry and will allow the maximum possible ringing voltage, while giving the most effective protection. on a connected line, the tip c onductor will have much smaller voltage levels than the open-circuit ring conductor values. here a tisp4xxxh3bj series, symmetrical voltage p rotector gives adequate protection. overvoltages are initially clipped by breakdown clamping. if sufficient current is available from the overvoltage, the breakdow n voltage will rise to the breakover level, which causes the device to switch into a low-voltage on-state condition. this switching action removes the high voltage stress from the following circuitry and causes the current resulting from the overvoltage to be safely diverted through the pro tector. the high holding (switch off) current helps prevent d.c. latchup as the diverted current subsides. how to order device symbol smb package (top view) device v drm v v (bo) v ?a265 +100 +125 -200 -265 rated for international surge wave shapes wave shape standard i tsp a 2/10 s gr-1089-core 500 8/20 s iec 61000-4-5 300 10/160 s tia/eia-is-968 250 10/700 s itu-t k.20/45/21 200 10/560 s tia/eia-is-968 160 10/1000 s gr-1089-core 100 12 mt2 mt1 md4a265 mt2 mt1 sd4xan device package carrier TISP4A265H3BJ bj (j-bend do-214aa/smb) r (embossed tape reeled) TISP4A265H3BJr-s order as *rohs directive 2002/95/ec jan 27 2003 including annex * r o h s c o m p l i a n t ............................................... ul recognized component
january 2002 - revised may 2007 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. description (continued) TISP4A265H3BJ lcas r line protector overload ratings, t a = 25 c (unless otherwise noted) absolute maximum ratings, t a = 25 c (unless otherwise noted) the TISP4A265H3BJ is guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. th is high (h) current protection device is in a plastic smbj package (jedec do-214aa with j-bend leads) and supplied in embossed carrier reel pack. for alternative voltage and holding current values, consult the factory. rating symbol value unit repetitive peak off-state voltage, (see note 1) v drm +100 -200 v non-repetitive peak on-state pulse current (see notes 2, 3 and 4) i tsp a 2/10 s (gr-1089-core, 2/10 s voltage wave shape) 500 8/20 s (iec 61000-4-5, 1.2/50 s voltage, 8/ 20 current combination wave generator) 300 10/160 s (tia/eia-is-968 (replaces fcc part 68), 10/160 s voltag e wave shape) 250 5/310 s (itu-t k.44, 10/700 s voltage wave shape used in k.20/45/21) 200 5/320 s (tia/eia-is-968 (replaces fcc part 68), 9/720 s voltage wave shape) 200 10/560 s (tia/eia-is-968 (replaces fcc part 68), 10/560 s voltag e wave shape) 160 10/1000 s (gr-1089-core, 10/1000 s voltage wave shape) 100 non-repetitive peak on-state current (see notes 2, 3 and 5) i tsm 55 60 2.2 a 20 ms (50 hz) full sine wave 16.7 ms (60 hz) full sine wave 1000 s 50 hz/60 hz a.c. initial rate of rise of on-sta te current, exponential current ramp, maximum ramp value < 200 a di t /dt 400 a/ s junction temperature t j -40 to +150 c storage temperature range t stg -65 to +150 c notes: 1. see figure 7 for voltage values at other temperatures. 2. initially, the TISP4A265H3BJ must be in thermal equilibrium with t j = 25 c. 3. the surge may be repeated after the TISP4A265H3BJ returns to its initial conditions. 4. see figure 8 for current ratings at other temperatures. 5. eia/jesd51-2 environment and eia/jesd51-3 pcb with standard footprint dimensions connected with 5 a rated printed wiring track widths. see figure 6 for the current ratings at other durations. derate current values at -0.61 %/ c for ambient temperatures above 25 c. rating symbol value unit maximum overload on-state current without open circuit, 50 hz/60 hz a.c. (see note 6) 0.03 s 0.07 s 1.6 s 5.0 s 1000 s i t(ov)m 60 40 8 7 2.2 a rms note 6: peak overload on-state current during a.c. power cross tests of gr-1089-core and ul 1950/60950. these electrical stress levels may damage the TISP4A265H3BJ silicon chip. after test, the pass criterion is either that the device is functional or, if it is faulty, that it has a short circuit fault mode. in the short circuit fault mode, the following equipment is protected as the de vice is a permanent short across the line. the equipment would be unprotected if an open circuit fault mode developed.
january 2002 - revised may 2007 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP4A265H3BJ lcas r line protector electrical characteristics, t a = 25 c (unless otherwise noted) parameter test conditions min typ max unit i drm repetitive peak off- state current v d = +100 v and -200 v t a = 25 c t a = 85 c 5 10 a v (bo) breakover voltage dv/dt = 250 v/ms, r source = 300 ? +125 -265 v i (bo) breakover current dv/dt = 250 v/ms, r source = 300 ? 0.15 0.6 a i h holding current i t = 5 a, di/dt = +/-30 ma/ms 0.15 0.6 a dv/dt critical rate of rise of off-state voltage linear voltage ramp, maximum ramp value < 0.85v drm 5 kv/ s i d off-state current v d = 50 v t a = 85 c 10 a c off off-state capacitance f = 1 mhz, v d = 1 v rms, (see note 7) v d =98v v d =50v v d =10v v d =5v v d =2v v d =1v v d =0 v d =-1v v d =-2v v d =-5v v d =-10v v d =-50v v d =-100v 25 30 45 52 60 65 71 65 58 48 40 26 20 30 36 54 62 72 79 86 79 69 57 48 31 24 pf note 7: to avoid possible voltage clipping, the TISP4A265H3BJ is tested with v = +98 v in the positive polarity. d . thermal characteristics parameter test conditions min typ max unit r ja junction to free air thermal resistance eia/jesd51-3 pcb, i t = i tsm(1000) , t a = 25 c, (see note 8) 113 c/w 265 mm x 210 mm populated line card, 4-layer pcb, i t = i tsm(1000) , t a = 25 c 50 note 8: eia/jesd51-2 environment and pcb has standard footprint dimensions connected with 5 a rated printed wiring track widths.
january 2002 - revised may 2007 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP4A265H3BJ lcas r line protector parameter measurement information figure 1. voltage-current characteristic for mt1 and mt2 terminals all measurements are referenced to the mt1 terminal -v v drm i drm v d i h i tsm i ppsm v (bo) i (bo) i d quadrant i i switching characteristic switching characteristic +v +i v (bo) i (bo) v drm i drm v d i d i h i tsm i ppsm -i quadrant iii pmxxaea
january 2002 - revised may 2007 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP4A265H3BJ lcas r line protector typical characteristics figure 2. figure 3. figure 4. figure 5. off-state current vs junctio n temperature t j - junction temperature - c -25 0 25 50 75 100 125 150 |i d | - off-state current - a 0?01 0?1 0? 1 10 100 tchag v d = 50 v normalized breakover voltage vs junction temperature t j - junction temperature - c -25 0 25 50 75 100 125 150 normalized breakover voltage 0.95 1.00 1.05 1.10 tc4haf on-state current vs on-state voltage v t - on-state voltage - v 0.7 1.5 2 3 4 5 7 110 i t - on-state current - a 1.5 2 3 4 5 7 15 20 30 40 50 70 150 200 1 10 100 t a = 25 c t w = 100 s tc4hacba normalized holding current vs junction temperature t j - junction temperature - c c -25 0 25 50 75 100 125 150 normalized holding current or 0.4 0.5 0.6 0.7 0.8 0.9 1.5 2.0 1.0 tc4had
january 2002 - revised may 2007 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP4A265H3BJ lcas r line protector rating and thermal information figure 6. figure 7. figure 8. non -repetitive peak on-state current vs current duration t - current duration - s 0 1 1 10 100 1000 i tsm(t) - non-repetitive peak on-state current - a 1.5 2 3 4 5 6 7 8 9 15 20 30 10 ti4hac v gen = 600 vrms, 50/60 hz r gen = 1.4*v gen /i tsm(t) eia/jesd51-2 environment eia/jesd51-3 pcb t a = 25 c v drm derating factor vs minimum ambient temperature t amin - minimum ambient temperature - c -35 -25 -15 -5 5 15 25 -40 -30 -20 -10 0 10 20 derating factor 0.93 0.94 0.95 0.96 0.97 0.98 0.99 1.00 ti4hadc impulse rating vs ambient temperature t a - ambient temperat ure - c -40-30-20-10 0 1020304050607080 impulse curren t - a 90 100 120 150 200 250 300 400 500 600 700 iec 1.2/50, 8/20 itu-t 10/700 fcc 10/560 bellcore 2/10 bellcore 10/1000 fcc 10/160 tc4haa
january 2002 - revised may 2007 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP4A265H3BJ lcas r line protector typical circuits figure 9. integrated voice data (ivd) system with typical operating voltage levels indicated ring generator r1 th1 slic ring tip sw3 ring return switch sw4 ringing access switch sw1 break switch th2 control logic ai4a265a '7581 lcas f1 f2 adsl modem v bat t line r ring t ring t bat r bat f gnd v bat sw2 break switch scr, diode protection r line low pass filter high pass filter c1 r2 -48 v (v bat ) 86 v rms (v ring ) +74 v, -170 v (v gen ) 23 v (v adsl ) +97 v, -193 v (v ring ) +23 v, -64 v (v tip ) 1.25 a surge withstand e.g. smp 1. 25 tisp4125h3bj (th1) TISP4A265H3BJ (th2) le7555
january 2002 - revised may 2007 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. TISP4A265H3BJ lcas r line protector carrier information mechanical data recommended printed wiring land pattern dimensions device symbolization code devices will be coded as below. terminal 1 is indicated by an adjacent bar marked on the package body. for production quantities, the carrier will be embossed tape reel pack. evaluation quantities may be shipped in bulk pack or em bossed tape. smb land pattern mdxx bid 2.54 (.100) 2.40 (.095) 2.16 (.085) dimensions are: millimeters (inches) device symbolization code TISP4A265H3BJ 4a265h package carrier standard quantity smb embossed tape reel pack 3000 ?isp?is a trademark of bourns, ltd., a bourns company, and is registered in u.s. patent and trademark office. ?ourns?is a registered trademark of bourns, inc. in the u.s. and other countries.
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